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INNOSILICON PHY IP SPECIFICATION REQUEST FORM

Name * Company *
Job title
Contact info * and/or
DDRn
/LPDDRn
Process Node Supported DDR Protocol Requirement (PHY, Controller) Max Data Rate (Mbps) PCB Type DQ Bus width Metal Option PHY Die Shape Package type    DFI Protocol Any special request
SERDES  Process Node Supported Serdes Standard Data Rate (Mbps)   Number of Port/lane Register Access Interface  Input Clock Metal Option Poly Orientation Package type    Any special request
USB2.0 Process Node Supported Type Number of Port/lane Data Bus Register Access Interface Input Clock Metal Option Poly Orientation Package type    Any special request
MIPI DPHY Process Node Max Data Rate(Mbps)/lane  Number of Port/lane Requested Type Register Access Interface Input Clock Metal Option Poly Orientation Package type  Requirement
(PHY, Controller)
Any special request
MIPI MPHY Process Node Supported Standard Max Data Rate(Mbps)/lane   Number of Port/lane Register Access Interface Input Clock Metal Option Poly Orientation Package type  Any special request
HDMI Tx Process Node Supported HDMI Protocol Requirement PHY&Controller Highest Data Rate Register Access Interface Reference Clock Metal Option Poly Orientation Package type HDCP Protocol
(if Controller needed)
Any special request
DP/eDP Tx Process Node Supported DP/eDP Protocol Requirement PHY&Controller Highest Data Rate Register Access Interface Reference Clock Metal Option Poly Orientation Package type Any special request
Audio Codec Process Node Sample Rate/Input Clock Number of Channel Digital Interface Register Access Interface Resolution Metal Option Poly Orientation Package type SNR/SNDR
/THD
Power Consumption Any special request
AD/DA Process Node Sample Rate Supported Standrad Resolution Register Access Interface Input Clock Metal Option Poly Orientation Package type  SNR/SNDR
/THD
Power Consumption Any special request
PLL Process Node Output Clock Power Comsuption Type Layout Area Input Clock Metal Option Poly Orientation Package type    Any special request
DDRn
/LPDDRn
Process Node Supported DDR Protocol Requirement (PHY, Controller) Max Data Rate (Mbps) PCB Type DQ Bus width Metal Option PHY Die Shape Package type    DFI Protocol Any special request
SERDES  Process Node Supported Serdes Standard Data Rate (Mbps)   Number of Port/lane Register Access Interface  Input Clock Metal Option Poly Orientation Package type    Any special request
USB2.0 Process Node Supported Type Number of Port/lane Data Bus Register Access Interface Input Clock Metal Option Poly Orientation Package type    Any special request
MIPI DPHY Process Node Max Data Rate(Mbps)/lane  Number of Port/lane Requested Type Register Access Interface Input Clock Metal Option Poly Orientation Package type  Requirement
(PHY, Controller)
Any special request
MIPI MPHY Process Node Supported Standard Max Data Rate(Mbps)/lane   Number of Port/lane Register Access Interface Input Clock Metal Option Poly Orientation Package type  Any special request
HDMI Tx Process Node Supported HDMI Protocol Requirement PHY&Controller Highest Data Rate Register Access Interface Reference Clock Metal Option Poly Orientation Package type HDCP Protocol
(if Controller needed)
Any special request
DP/eDP Tx Process Node Supported DP/eDP Protocol Requirement PHY&Controller Highest Data Rate Register Access Interface Reference Clock Metal Option Poly Orientation Package type Any special request
Audio Codec Process Node Sample Rate/Input Clock Number of Channel Digital Interface Register Access Interface Resolution Metal Option Poly Orientation Package type SNR/SNDR
/THD
Power Consumption Any special request
AD/DA Process Node Sample Rate Supported Standrad Resolution Register Access Interface Input Clock Metal Option Poly Orientation Package type  SNR/SNDR
/THD
Power Consumption Any special request
PLL Process Node Output Clock Power Comsuption Type Layout Area Input Clock Metal Option Poly Orientation Package type    Any special request